Install the RISC-V toolchain

What you actually need

Three things, and the versions matter more than the brands:

• a RISC-V cross-compiler that targets rv64gcv
• an LLVM/MLIR build you can call from scripts
• QEMU, because you will not be benchmarking on real silicon for months

Pin all three in a VERSIONS.md next to the project. You will be reading your own notes six weeks from now, when a lowering pass behaves differently and you cannot remember whether it is you.

Verify the rig before you trust it

Compile one file and run it under QEMU with the vector extension enabled:

riscv64-linux-gnu-gcc -march=rv64gcv -mabi=lp64d -static -O2 hello.c -o hello
qemu-riscv64 -cpu rv64,v=true,vlen=256,elen=64,vext_spec=v1.0 ./hello

If that prints, you have a rig. If it does not, stop here — every number you produce later is downstream of this working.

The trap nobody warns you about

A lot of cheap RISC-V hardware ships RVV 0.7.1, not 1.0, and the intrinsics differ. Stay on QEMU until the lowering path works end to end. Buying a board first is how people spend three weeks on a toolchain bug that has nothing to do with the thing they are learning.